1. Field of Invention
The invention relates to a memory access method and the device thereof. In particular, it relates to the method and device for accessing internal memory of a processor.
2. Related Art
The processing efficiency of normal processors, particularly the embedded processors commonly used in system chips, is often limited by the waiting time for accessing external memory. The processor is mostly idle when accessing the external memory.
As shown in FIG. 1, cache memory 10 is often built inside the processor to improve its efficiency in data access. It is seen in the drawing that the processor 8 comprises a processing unit 40. Data often used by the processing unit 40 are stored in the cache memory 10. Therefore, the processing unit 40 only needs to extract data from the cache memory without accessing the external memory 20 via an external bus 34. Accessing the cache memory 10 via an internal bus 32 can save a lot of data accessing time. The overall processing speed of the processor 8 thus increases considerably. If the cache data is missing, the so-called cache-miss, the processor 40 still has to access the data stored in the external memory 20 via the external bus 34. The operations of the internal bus 32 and the external bus 34 are controlled by a bus controller 30.
With reference to FIG. 2, to solve the cache-miss problem, a conventional method is to assign a particular address range as the internal memory 12 of the processor 8. The internal memory 12 is also called the scratchpad memory (SPM) or tightly coupled memory (TCM). The access of the processing unit 40 in the address range is via the internal bus 32, instead of the external bus. Since the internal memory 12 is very similar to the cache memory 10, it can hold a lot of data without special treatment such as storing data according to a caching algorithm and worrying about the cache-miss problem. However, most of the data processed by the processor 8 need to be written into the external memory 20 and the processor 8 still has to read in new data from the external memory 20, the processing unit 40 still has some idle time when accessing the external memory 20.